By Casey J,Chip Estimate Corp.
When I joined the design automation industry in 1980 at Calma, CAD stood for computer-aided design. But now that EDA(Electronic Design Automation) has taken over as more common term, I’ll take the liberty of resurrecting the old familiar acronym and follow the lead of the industry around reuse and apply CAD to an emerging trend: Cost-Aware Design. 
Along with performance and power, cost has always been a factor in assessing the viability of a chip project. As reported in the March 5, Electronic News article, “Cost now driving factor in ]tag]semiconductors[/tag],” managing costs becomes even more critical as new lithography nodes come online. Some techniques used by different companies are noted and include approaches aimed at controlling escalating manufacturing costs (portable manufacturing processes, outsourcing process R&D, and using FPGAs) and minimizing resources required to Read the rest of this entry »
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Honors were presented at the recent EE Times ACE Awards Gala as 
